Fuses are frequently used to reconfigure memory and logic circuitry. For example, in dynamic or static memory chips, defective memory cells or circuitry may be replaced by selectively blowing (destroying) fuses associated with the defective circuitry while activating redundant circuitry to form new circuitry. This circuit rerouting technique using selectively destroyed fuse links contributes to enhanced yields without the necessity of scrapping defective process wafers.
Generally, fuse links, made of a conductive material such as a metal, may be destroyed to form an open circuit by passing an excessive electrical current through the circuitry which melts the fuse link or by exposing the fuse link to intense laser irradiation to ablate the fuse link. Typically a window is formed above the fuse link of thin transparent material, for example oxide, to allow sufficient laser energy to impact the fuse link.
In more recent practices, the laser ablation method is preferred since it is faster, more accurate and leaves less residue within the fuse link window area. However, as device sizes decrease to 0.25 microns and multilevel device circuitry is employed to achieve the desired circuit density, Low-K (low dielectric constant) materials have become necessary in the formation of dielectric insulating layers, also referred to as inter-metal dielectric (IMD) layers in order to reduce circuit capacitance and therefore increase signal transport speeds. Low-K materials way include porous inorganic silicon oxide based materials which are generally less mechanically strong and subject to cracking when subjected to thermal mismatch stresses.
Another problem with the use of low-K materials is the poor adhesive strength of such materials which are susceptible to delamination in the presence of induced stresses including thermal mismatch stresses. Guard rings have been proposed for use around fuse areas to prevent the migration of contamination from the fuse link area into surrounding dielectric insulating areas following the ‘blowing’ of fuses to reconfigure the device circuitry.
Generally fuse link structure have been limited to metals with a low melting point, such as aluminum since less energy is required to destroy the fuses, and sufficient energy can easily be transported through overlying light transparent windows. While the use of copper would be desirable in that the same process technology could be used for forming the fuse link structure as is used for forming metal interconnects in underlying layers, such as damascenes, the use of copper damascene fuse links has presented several problems in implementation.
For example, copper generally requires much higher levels of energy to destroy a copper fuse, due to its high thermal conductivity and it higher melting point compared to aluminum. In addition, the fuse link layer, also referred to as a redundancy layer, is typically a thicker layer for various reasons with the metal fuses having thicknesses of about 10,000 Angstroms. The use of high laser energies or electrical current energies required to destroy a copper fuse frequently causes damage to underlying dielectric insulating layers, for example low-K dielectric insulating layers, thereby reducing wafer yield and device reliability.
Therefore, there is a need in the semiconductor processing art to develop a structure and method of forming copper fuse links such that the fuse links may be reliably formed and destroyed in a circuit reconfiguration process while avoiding damage to underlying dielectric insulating layers.
It is therefore an object of the invention to provide a structure and method of forming copper fuse links such that the fuse links may be reliably formed and destroyed in a circuit reconfiguration process while avoiding damage to underlying dielectric insulating layers, in addition to overcoming other shortcomings of the prior art.